The code runs correctly on EDAplayground with an older Icarus 10.0. So my guess is you didn’t enable the SystemVerilog flag -g2012. By default Icarus runs in Verilog IEEE1364-2005 [1]; which is the same as setting the flag -g2005

Verilog only allows wires to be driven by assign statements or output ports. SystemVerilog relaxed the rule so reg and logic driven by assign statements or output ports so long as that is the only driver. (Bit off topic but, I personally prefer following the stricter Verilog rules because not all tools have strong single source driver checking for reg and logic driven by assign statements or output ports)

Anyway, try this command:

iverilog -Wall -g2012 <file-with-above-content>